A dynamic optically reconfigurable gate array - Perfect emulation

Daisaku Seto, Minoru Watanabe

Research output: Contribution to journalArticlepeer-review

69 Citations (Scopus)


This paper presents a perfect dynamic optically reconfigurable gate array (DORGA) architecture emulation using a holographic memory and a conventional ORGA-VLSI. In ORGAs, although a large virtual gate count can be realized by exploiting the large-capacity storage capability of a holographic memory, the actual gate count, which is the gate count of a programmable gate array VLSI, is important to increase the instantaneous performance. Nevertheless, in previously proposed ORGA-VLSIs, the static configuration memory to store a single configuration context consumed a large implementation area of the ORGA-VLSIs and prevented the realization of large-gate-count ORGA-VLSIs. Therefore, a DORGA architecture has been proposed in order to increase the gate density. It uses the junction capacitance of photodiodes as dynamic memory, thereby obviating the static configuration memory. However, to date, demonstration of a perfect optically reconfigurable architecture for DORGA-VLSIs has never been presented. Therefore, in this study, the DORGA architecture was perfectly emulated, and the performance, particularly the reconfiguration context retention time, was measured experimentally. The advantages of this architecture are discussed in relation to the results.

Original languageEnglish
Pages (from-to)493-500
Number of pages8
JournalIEEE Journal of Quantum Electronics
Issue number5
Publication statusPublished - 2008
Externally publishedYes


  • Field-programmable gate arrays (FPGAs)
  • Holographic memories
  • Optical data processing
  • Programmable logic devices
  • Semiconductor laser arrays

ASJC Scopus subject areas

  • Atomic and Molecular Physics, and Optics
  • Condensed Matter Physics
  • Electrical and Electronic Engineering


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