TY - CHAP
T1 - A high-density optically reconfigurable gate array using dynamic method
AU - Watanabe, Minoru
AU - Kobayashi, Fuminori
PY - 2004
Y1 - 2004
N2 - A high-density optically reconfigurable gate array (ORGA) is proposed to improve the gate density of conventional ORGAs, which are a type of Field Programmable Gate Array (FPGA). However, unlike FPGAs, an ORGA is reconfigured optically with external optical memories. A conventional ORGA has many programming elements, just as FPGAs do. One programming element consists of: a photodiode to detect an optical reconfiguration signal; a latch, a flip-flop or a bit of memory to temporarily store the reconfiguration bit; and some transistors. Among those components, the latch, flip-flop, or memory occupies a large implementation area on a typical VLSI chip; it prevents realization of a high-gate-density ORGA. This paper presents a high-density ORGA structure that eliminates latches, flip-flops, and memory using a dynamic method and a design of an ORGA-VLSI chip with four optically reconfigurable logic blocks, five optically reconfigurable switching matrices, and four optical reconfigurable I/O blocks including four I/O bits. It uses 0.35 μℳ 3-Metal CMOS process technology. This study also includes some experimental results.
AB - A high-density optically reconfigurable gate array (ORGA) is proposed to improve the gate density of conventional ORGAs, which are a type of Field Programmable Gate Array (FPGA). However, unlike FPGAs, an ORGA is reconfigured optically with external optical memories. A conventional ORGA has many programming elements, just as FPGAs do. One programming element consists of: a photodiode to detect an optical reconfiguration signal; a latch, a flip-flop or a bit of memory to temporarily store the reconfiguration bit; and some transistors. Among those components, the latch, flip-flop, or memory occupies a large implementation area on a typical VLSI chip; it prevents realization of a high-gate-density ORGA. This paper presents a high-density ORGA structure that eliminates latches, flip-flops, and memory using a dynamic method and a design of an ORGA-VLSI chip with four optically reconfigurable logic blocks, five optically reconfigurable switching matrices, and four optical reconfigurable I/O blocks including four I/O bits. It uses 0.35 μℳ 3-Metal CMOS process technology. This study also includes some experimental results.
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U2 - 10.1007/978-3-540-30117-2_28
DO - 10.1007/978-3-540-30117-2_28
M3 - Chapter
AN - SCOPUS:35048891485
SN - 3540229892
SN - 9783540229896
T3 - Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
SP - 261
EP - 269
BT - Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
A2 - Becker, Jurgen
A2 - Platzner, Marco
A2 - Vernalde, Serge
PB - Springer Verlag
ER -