| Original language | English |
|---|---|
| Pages (from-to) | 866-872 |
| Number of pages | 7 |
| Journal | IEICE Transactions on Fundamentals |
| Volume | E81-A |
| Issue number | 5 |
| Publication status | Published - 1998 |
A neural-greedy combination algorithm for board-level routing in FPGA-based logic emulation systems
Research output: Contribution to journal › Article
2
Citations
(Scopus)