Asynchronous Dynamically Reconfigurable Logic LSIs Suitable for Technology Scaling

Akira Nagoya

Research output: Contribution to journal › Article

Original language	English
Pages (from-to)	458-465
Number of pages	8
Journal	Proc. of 12th Workshop on Synthesis and System Integration of Mixed Information Technologies
Publication status	Published - 2004

Cite this

TY - JOUR

T1 - Asynchronous Dynamically Reconfigurable Logic LSIs Suitable for Technology Scaling

AU - Nagoya, Akira

PY - 2004

Y1 - 2004

M3 - Article

SP - 458

EP - 465

JO - Proc. of 12th Workshop on Synthesis and System Integration of Mixed Information Technologies

JF - Proc. of 12th Workshop on Synthesis and System Integration of Mixed Information Technologies

ER -