Design and performance evaluation of software defined radio prototype for PHS and IEEE802.11 wireless LAN

Kazuhiro Uehara, Hiroyuki Shiba, Takashi Shono, Yushi Shirato, Hiroshi Yoshioka, Masashi Nakatsugawa, Shuji Kubota, Masahiro Umehira

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Abstract

A software defined radio (SDR) prototype based on a multiprocessor architecture (MPA) is developed. Software for Japanese personal handy phone system (PHS) of a 2G mobile system, and IEEE802.11 wireless LAN, which has much wider bandwidth than the 2G systems, is successfully implemented. Newly developed flexible-rate pre-/post-processor (FR-PPP) achieves the flexibility and wideband performance that the platform needs. This paper shows the design of the SDR prototype and evaluates its performance by experiments that include PHS processor load and processing delay characteristics and wireless LAN processor load and throughput characteristics.

Original languageEnglish
Title of host publication13th IEEE International Symposium on Personal, Indoor and Mobile Radio Communications, PIMRC 2002
Pages452-457
Number of pages6
DOIs
Publication statusPublished - Dec 1 2002
Externally publishedYes
Event13th IEEE International Symposium on Personal, Indoor and Mobile Radio Communications, PIMRC 2002 - Lisboa, Portugal
Duration: Sept 15 2002Sept 18 2002

Publication series

NameIEEE International Symposium on Personal, Indoor and Mobile Radio Communications, PIMRC
Volume1

Other

Other13th IEEE International Symposium on Personal, Indoor and Mobile Radio Communications, PIMRC 2002
Country/TerritoryPortugal
CityLisboa
Period9/15/029/18/02

Keywords

  • CPU
  • DSP
  • FPGA
  • IEEE802.11
  • Multiprocessor architecture
  • Over-the-air download
  • PHS
  • Software defined radio
  • Wireless LAN

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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