Abstract
A method to detect open node defects that cannot be detected by the conventional IDDQ test method has previously been proposed employing a sinusoidal wave superposed on the DC supply voltage. The present paper proposes a strategy to improve the detectability of the test method by means of frequency analysis of the supply current. In this strategy, defects are detected by determining whether secondary harmonics of the sinusoidal wave exist in the supply current. The effectiveness of the method is confirmed by experiments on two CMOS NAND gate packages (SSIs).
Original language | English |
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Pages (from-to) | 685-687 |
Number of pages | 3 |
Journal | IEICE Transactions on Information and Systems |
Volume | E90-D |
Issue number | 3 |
DOIs | |
Publication status | Published - Mar 2007 |
Keywords
- Current test
- Floating gate defect
- Frequency analysis
- Open node defect
ASJC Scopus subject areas
- Software
- Hardware and Architecture
- Computer Vision and Pattern Recognition
- Electrical and Electronic Engineering
- Artificial Intelligence