TY - GEN
T1 - Development of an SiC High-Frequency PWM Inverter Using a Thick Multilayer PCB to Minimize Stray Inductance
AU - Ishikawa, Kohsuke
AU - Ogasawara, Satoshi
AU - Takemoto, Masatsugu
AU - Orikawa, Koji
N1 - Funding Information:
ACKNOWEL DGMENT This work was supported by Council for Science, Technology and Innovation (CSTI), Cross -ministerial Strategic Innovation Promotion Program (SIP), N“ ext - generation power electronics” (funding agency: NEDO)
Publisher Copyright:
© 2018 IEEJ Industry Application Society.
PY - 2018/10/22
Y1 - 2018/10/22
N2 - Inverters using SiC or GaN power devices can realize high frequency and high efficiency operation. To achieve high efficiency, the switching characteristics of these power devices are important, because stray inductances in inverter main circuit have strong influence on the switching characteristics. To reduce the switching loss and surge voltage, minimization of stray inductance in the main circuit is required for high-frequency PWM inverter. This paper describes design guidelines for high-frequency inverters that realize low inductance. The PCB design guideline on the thick multilayer PCB is derived from the inductance calculation using 3D-FEA. It is shown experimentally, that the stray inductance of designed PCB can be reduced to the same level as the inductance inside the power devices. Experimental results verify that a prototype can achieve high speed switching and can suppress surge voltage. A load test is demonstrated to evaluate main circuit efficiency in half-bridge inverter at 100 kHz.
AB - Inverters using SiC or GaN power devices can realize high frequency and high efficiency operation. To achieve high efficiency, the switching characteristics of these power devices are important, because stray inductances in inverter main circuit have strong influence on the switching characteristics. To reduce the switching loss and surge voltage, minimization of stray inductance in the main circuit is required for high-frequency PWM inverter. This paper describes design guidelines for high-frequency inverters that realize low inductance. The PCB design guideline on the thick multilayer PCB is derived from the inductance calculation using 3D-FEA. It is shown experimentally, that the stray inductance of designed PCB can be reduced to the same level as the inductance inside the power devices. Experimental results verify that a prototype can achieve high speed switching and can suppress surge voltage. A load test is demonstrated to evaluate main circuit efficiency in half-bridge inverter at 100 kHz.
KW - PCB design
KW - SiC-MOSFET
KW - Stray Inductance
KW - Thick Multilayer PCB
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U2 - 10.23919/IPEC.2018.8507376
DO - 10.23919/IPEC.2018.8507376
M3 - Conference contribution
AN - SCOPUS:85057331925
T3 - 2018 International Power Electronics Conference, IPEC-Niigata - ECCE Asia 2018
SP - 2725
EP - 2731
BT - 2018 International Power Electronics Conference, IPEC-Niigata - ECCE Asia 2018
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 8th International Power Electronics Conference, IPEC-Niigata - ECCE Asia 2018
Y2 - 20 May 2018 through 24 May 2018
ER -