Abstract
This paper describes the hardware features and performance improvement techniques employed in the central processing unit of the new DIPS-11/5E series. Internal performance is 2. 5 to 3 times higher than that of the earlier DIPS-11/5 series thanks to use of advanced high-speed, high-density logic LSIs (2000-5000 gates/chip), as well as improved hardware architectures. Extensive LSI also use results in lower power consumption, more compact size, and greater reliability. The dyadic configuration allows each model to be upgraded over a wide range. DIPS architecture has been extended while maintaining compatibility with earlier models. New features are an extended addressing architecture, and high-speed virtual machine functions supported by hardware.
| Original language | English |
|---|---|
| Pages (from-to) | 57-65 |
| Number of pages | 9 |
| Journal | Denki Tsushin Kenkyujo kenkyu jitsuyoka hokoku |
| Volume | 36 |
| Issue number | 1 |
| Publication status | Published - Jan 1 1987 |
| Externally published | Yes |
ASJC Scopus subject areas
- Engineering(all)