Effective VLSI architecture for Compressed Sensing based channel estimation in ISDB-T system

Rian Ferdian; Yafei Hou; Minoru Okada

doi:10.1109/ISCIT.2015.7458360

Effective VLSI architecture for Compressed Sensing based channel estimation in ISDB-T system

Rian Ferdian, Yafei Hou, Minoru Okada

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

1 Citation (Scopus)

Abstract

Compressed Sensing (CS) based channel estimation has been proven to give a better reconstruction results compared to conventional method. Despite promising a better result, CS based channel estimation still suffers from high complexity computations due to huge matrix multiplication and matrix inversion operations. This paper will propose an effective CS based channel estimation VLSI architecture for ISDB-T system. Since ISDB-T system is using orthogonal frequency division multiplexing (OFDM) technique for its transmission, its CS channel estimation will utilize a measurement matrix which is formed by parts of Discrete Fourier Transform (DFT) matrix. By exploiting the fact that the measurement matrix will inherit some symmetrical properties from DFT matrix, we can achieve a low complexity CS based channel estimation for practical implementation.

Original language	English
Title of host publication	2015 15th International Symposium on Communications and Information Technologies, ISCIT 2015
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	273-276
Number of pages	4
ISBN (Electronic)	9781467368209
DOIs	https://doi.org/10.1109/ISCIT.2015.7458360
Publication status	Published - Apr 22 2016
Externally published	Yes
Event	15th International Symposium on Communications and Information Technologies, ISCIT 2015 - Nara, Japan Duration: Oct 7 2015 → Oct 9 2015

Publication series

Name	2015 15th International Symposium on Communications and Information Technologies, ISCIT 2015

Other

Other	15th International Symposium on Communications and Information Technologies, ISCIT 2015
Country/Territory	Japan
City	Nara
Period	10/7/15 → 10/9/15

ASJC Scopus subject areas

Computer Networks and Communications
Information Systems

Access to Document

10.1109/ISCIT.2015.7458360

Cite this

Ferdian, R., Hou, Y., & Okada, M. (2016). Effective VLSI architecture for Compressed Sensing based channel estimation in ISDB-T system. In 2015 15th International Symposium on Communications and Information Technologies, ISCIT 2015 (pp. 273-276). Article 7458360 (2015 15th International Symposium on Communications and Information Technologies, ISCIT 2015). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ISCIT.2015.7458360

Effective VLSI architecture for Compressed Sensing based channel estimation in ISDB-T system. / Ferdian, Rian; Hou, Yafei; Okada, Minoru.
2015 15th International Symposium on Communications and Information Technologies, ISCIT 2015. Institute of Electrical and Electronics Engineers Inc., 2016. p. 273-276 7458360 (2015 15th International Symposium on Communications and Information Technologies, ISCIT 2015).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Ferdian, R, Hou, Y & Okada, M 2016, Effective VLSI architecture for Compressed Sensing based channel estimation in ISDB-T system. in 2015 15th International Symposium on Communications and Information Technologies, ISCIT 2015., 7458360, 2015 15th International Symposium on Communications and Information Technologies, ISCIT 2015, Institute of Electrical and Electronics Engineers Inc., pp. 273-276, 15th International Symposium on Communications and Information Technologies, ISCIT 2015, Nara, Japan, 10/7/15. https://doi.org/10.1109/ISCIT.2015.7458360

Ferdian R, Hou Y, Okada M. Effective VLSI architecture for Compressed Sensing based channel estimation in ISDB-T system. In 2015 15th International Symposium on Communications and Information Technologies, ISCIT 2015. Institute of Electrical and Electronics Engineers Inc. 2016. p. 273-276. 7458360. (2015 15th International Symposium on Communications and Information Technologies, ISCIT 2015). doi: 10.1109/ISCIT.2015.7458360

Ferdian, Rian ; Hou, Yafei ; Okada, Minoru. / Effective VLSI architecture for Compressed Sensing based channel estimation in ISDB-T system. 2015 15th International Symposium on Communications and Information Technologies, ISCIT 2015. Institute of Electrical and Electronics Engineers Inc., 2016. pp. 273-276 (2015 15th International Symposium on Communications and Information Technologies, ISCIT 2015).

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abstract = "Compressed Sensing (CS) based channel estimation has been proven to give a better reconstruction results compared to conventional method. Despite promising a better result, CS based channel estimation still suffers from high complexity computations due to huge matrix multiplication and matrix inversion operations. This paper will propose an effective CS based channel estimation VLSI architecture for ISDB-T system. Since ISDB-T system is using orthogonal frequency division multiplexing (OFDM) technique for its transmission, its CS channel estimation will utilize a measurement matrix which is formed by parts of Discrete Fourier Transform (DFT) matrix. By exploiting the fact that the measurement matrix will inherit some symmetrical properties from DFT matrix, we can achieve a low complexity CS based channel estimation for practical implementation.",

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AB - Compressed Sensing (CS) based channel estimation has been proven to give a better reconstruction results compared to conventional method. Despite promising a better result, CS based channel estimation still suffers from high complexity computations due to huge matrix multiplication and matrix inversion operations. This paper will propose an effective CS based channel estimation VLSI architecture for ISDB-T system. Since ISDB-T system is using orthogonal frequency division multiplexing (OFDM) technique for its transmission, its CS channel estimation will utilize a measurement matrix which is formed by parts of Discrete Fourier Transform (DFT) matrix. By exploiting the fact that the measurement matrix will inherit some symmetrical properties from DFT matrix, we can achieve a low complexity CS based channel estimation for practical implementation.

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Effective VLSI architecture for Compressed Sensing based channel estimation in ISDB-T system

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