TY - GEN
T1 - Equivalent current source of side-channel signal for countermeasure design with analog circuit simulator
AU - Amano, Tetsuo
AU - Iokibe, Kengo
AU - Toyota, Yoshitaka
PY - 2012/12/12
Y1 - 2012/12/12
N2 - Side-channel attack is a cryptanalytic attack based on information gained from the physical implementation of a cryptographic IC. The simultaneous switching noise (SSN) current is generated as logic gates in cryptographic IC switch simultaneously in encryption processes. SSN current is a cause of electromagnetic interference (EMI). In this study, linear equivalent circuit modeling was examined for the sake of a developing method to evaluate cryptographic systems before fabrication. A linear equivalent circuit model of a cryptographic FPGA, in which an AES algorithm had been implemented, was determined from experimental measurements. The model was implemented into a commercial analog circuit simulator, and the SSN current was estimated under three configurations among which a decoupling circuit, used as a countermeasure, was changed. Estimated current traces were analyzed statistically by using the correlation power analysis (CPA) method to obtain correlation values, a major index security against side-channel attacks. Variation of the correlation values with a decoupling configuration agreed with the corresponding experimental results also obtained in this study. This means that the security of cryptographic devices against side-channel attacks based on analysis of the SSN current can be estimated by using the equivalent circuit model before fabrication.
AB - Side-channel attack is a cryptanalytic attack based on information gained from the physical implementation of a cryptographic IC. The simultaneous switching noise (SSN) current is generated as logic gates in cryptographic IC switch simultaneously in encryption processes. SSN current is a cause of electromagnetic interference (EMI). In this study, linear equivalent circuit modeling was examined for the sake of a developing method to evaluate cryptographic systems before fabrication. A linear equivalent circuit model of a cryptographic FPGA, in which an AES algorithm had been implemented, was determined from experimental measurements. The model was implemented into a commercial analog circuit simulator, and the SSN current was estimated under three configurations among which a decoupling circuit, used as a countermeasure, was changed. Estimated current traces were analyzed statistically by using the correlation power analysis (CPA) method to obtain correlation values, a major index security against side-channel attacks. Variation of the correlation values with a decoupling configuration agreed with the corresponding experimental results also obtained in this study. This means that the security of cryptographic devices against side-channel attacks based on analysis of the SSN current can be estimated by using the equivalent circuit model before fabrication.
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U2 - 10.1109/ISEMC.2012.6351661
DO - 10.1109/ISEMC.2012.6351661
M3 - Conference contribution
AN - SCOPUS:84870725791
SN - 9781467320610
T3 - IEEE International Symposium on Electromagnetic Compatibility
SP - 806
EP - 811
BT - EMC 2012 - 2012 IEEE International Symposium on Electromagnetic Compatibility, Final Program
T2 - 2012 IEEE International Symposium on Electromagnetic Compatibility, EMC 2012
Y2 - 5 August 2012 through 10 August 2012
ER -