Fabrication method for icoriented si singleelectron transistors

Yukinori Ono, Yasuo Takahashi, Kenji Yamazaki, Masao Nagase, Hideo Namatsu, Kenji Kurihara, Katsumi Murase

Research output: Contribution to journalArticlepeer-review

3 Citations (Scopus)


A new fabrication method for Si singleelectron transistors (SET's) is proposed. The method applies thermal oxidation to a Si wire with a fine trench across it on a silicononinsulator substrate. During the oxidation the Si wire with the fine trench is converted in a selforganized manner into a twin SET structure with two singleelectron islands one along each edge of the trench due to positiondependent oxidationrate modulation caused by stress accumulation. Test devices demonstrated at 40K that the twin SET structure can operate as two individual SET's. Since the present method produces two SET's at the same time in a tiny area it is suitable for integrating logic circuits based on passtransistortype logic and CMOStype logic which promises to lead to the fabrication of singleelectron logic LSI's.

Original languageEnglish
Number of pages1
JournalIEEE Transactions on Electron Devices
Issue number1
Publication statusPublished - Dec 1 2000


  • Mosfet's
  • Nanotechnology
  • Quantum dots
  • Quantum effect semiconductor devices
  • Silicon
  • Tunneling

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering


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