TY - GEN
T1 - FPGA Trax Solver based on a neural network design
AU - Fujimori, Takumi
AU - Akabe, Tomoya
AU - Ito, Yoshizumi
AU - Akagi, Kouta
AU - Furukawa, Shinya
AU - Shinba, Hiroki
AU - Tanibata, Aoi
AU - Watanabe, Minoru
N1 - Publisher Copyright:
© 2015 IEEE.
PY - 2016/1/25
Y1 - 2016/1/25
N2 - For research related to field programmable gate arrays (FPGAs), various FPGA game solvers have been developed recently. The FPGA game solver can achieve up to 1,000 times faster processing speeds than processor-based operations. This paper presents one development of such FPGA game solvers: An FPGA Trax Solver based on a neural network design. The speed of the FPGA Trax Solver operations implemented on an FPGA (Arria II GX; Altera Corp.) is over 60 times greater than operation of C++ based software on a personal computer (Vostro 460; Dell Inc.).
AB - For research related to field programmable gate arrays (FPGAs), various FPGA game solvers have been developed recently. The FPGA game solver can achieve up to 1,000 times faster processing speeds than processor-based operations. This paper presents one development of such FPGA game solvers: An FPGA Trax Solver based on a neural network design. The speed of the FPGA Trax Solver operations implemented on an FPGA (Arria II GX; Altera Corp.) is over 60 times greater than operation of C++ based software on a personal computer (Vostro 460; Dell Inc.).
UR - http://www.scopus.com/inward/record.url?scp=84963532805&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=84963532805&partnerID=8YFLogxK
U2 - 10.1109/FPT.2015.7393119
DO - 10.1109/FPT.2015.7393119
M3 - Conference contribution
AN - SCOPUS:84963532805
T3 - 2015 International Conference on Field Programmable Technology, FPT 2015
SP - 260
EP - 263
BT - 2015 International Conference on Field Programmable Technology, FPT 2015
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - International Conference on Field Programmable Technology, FPT 2015
Y2 - 7 December 2015 through 9 December 2015
ER -