TY - GEN
T1 - Integrated approach for synthesizing LUT networks
AU - Yamashita, Shigeru
AU - Sawada, Hiroshi
AU - Nagoya, Akira
PY - 1999/12/1
Y1 - 1999/12/1
N2 - This paper presents a method for synthesizing look-up table (LUT) networks. The strategy employed by our method is very different from the strategies of previous methods; many decomposition methods that are not only algebraic but also functional are integrated very well. Our method can be thought of as a general framework for LUT network synthesis integrating various decomposition methods. The experimental results are very encouraging.
AB - This paper presents a method for synthesizing look-up table (LUT) networks. The strategy employed by our method is very different from the strategies of previous methods; many decomposition methods that are not only algebraic but also functional are integrated very well. Our method can be thought of as a general framework for LUT network synthesis integrating various decomposition methods. The experimental results are very encouraging.
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M3 - Conference contribution
AN - SCOPUS:0033358111
SN - 0769501044
T3 - Proceedings of the IEEE Great Lakes Symposium on VLSI
SP - 136
EP - 139
BT - Proceedings of the IEEE Great Lakes Symposium on VLSI
PB - IEEE
T2 - Proceedings of the 1999 9th Great Lakes Symposium on VLSI (GLSVLSI '99)
Y2 - 4 March 1999 through 6 March 1999
ER -