TY - GEN
T1 - Inversion/non-inversion reconfiguration scheme for a 0.18 μm CMOS process optically reconfigurable gate array VLSI
AU - Watanabe, Takahiro
AU - Watanabe, Minoru
PY - 2012
Y1 - 2012
N2 - To date, various optically reconfigurable gate arrays (ORGAs) have been developed to realize both fast reconfiguration and numerous l'econfiguration contexts. Optically differential reconfigurable gate arrays (ODRGAs) present advantageous capabilities compared with other ORGAs: they have increased the reconfiguration frequency per unit of laser power and have reduced optical configuration power consumption. On the other hand, dynamic optically reconfigurable gate arrays (DORGA) can realize the highest gate density, but an important disadvantage of DORGAs is that their reconfiguration frequency is lower than that of ODRGAs and their optical configuration power consumption is greater than that of ODRGAs. Therefore, a novel inversion/non-inversion dynamic optically reconfigurable gate array has been developed, adopting only the best attributes from both architectures. This paper presents an inversion/non- inversion implementation for a newly fabricated 0.18 μm CMOS process optically reconfigurable gate array VLSI.
AB - To date, various optically reconfigurable gate arrays (ORGAs) have been developed to realize both fast reconfiguration and numerous l'econfiguration contexts. Optically differential reconfigurable gate arrays (ODRGAs) present advantageous capabilities compared with other ORGAs: they have increased the reconfiguration frequency per unit of laser power and have reduced optical configuration power consumption. On the other hand, dynamic optically reconfigurable gate arrays (DORGA) can realize the highest gate density, but an important disadvantage of DORGAs is that their reconfiguration frequency is lower than that of ODRGAs and their optical configuration power consumption is greater than that of ODRGAs. Therefore, a novel inversion/non-inversion dynamic optically reconfigurable gate array has been developed, adopting only the best attributes from both architectures. This paper presents an inversion/non- inversion implementation for a newly fabricated 0.18 μm CMOS process optically reconfigurable gate array VLSI.
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U2 - 10.1109/MWSCAS.2012.6291971
DO - 10.1109/MWSCAS.2012.6291971
M3 - Conference contribution
AN - SCOPUS:84867289023
SN - 9781467325264
T3 - Midwest Symposium on Circuits and Systems
SP - 117
EP - 120
BT - 2012 IEEE 55th International Midwest Symposium on Circuits and Systems, MWSCAS 2012
T2 - 2012 IEEE 55th International Midwest Symposium on Circuits and Systems, MWSCAS 2012
Y2 - 5 August 2012 through 8 August 2012
ER -