Performance of IEEE 802.11 Wireless LAN implemented on software defined radio with hybrid programmable architecture

T. Shono, H. Shiba, Y. Shirato, K. Uehara, K. Araki, M. Umehira

Research output: Contribution to journalConference articlepeer-review

10 Citations (Scopus)


We have successfully fabricated a prototype software defined radio (SDR) transceiver that supports both Japanese PHS and IEEE 802.11 wireless LAN (WLAN). In this paper, we design an IEEE 802.11 WLAN around the SDR with its distributed and heterogeneous hybrid programmable architecture. The most difficult problem in implementing the WLAN in this way is how to meet the SIFS requirement in the IEEE 802.11 standard. This paper shows the hardware and software architecture of the prototype and how it can support the protocol processing of the IEEE 802.11 WLAN. The hybrid programmable architecture is a sophisticated combination of a general-purpose microprocessor (CPU), digital signal processors (DSPs), and programmable hardware (FPGAs). The MAC layer functions are executed on the CPU, and the PHY layer functions such as MODEM are processed by the DSP; higher-speed digital signal processes are run on the FPGA. This paper also describes an experimental evaluation of the prototype for IEEE 802.11 WLAN use.

Original languageEnglish
Pages (from-to)2035-2040
Number of pages6
JournalIEEE International Conference on Communications
Publication statusPublished - Jul 18 2003
Externally publishedYes
Event2003 International Conference on Communications (ICC 2003) - Anchorage, AK, United States
Duration: May 11 2003May 15 2003

ASJC Scopus subject areas

  • Computer Networks and Communications
  • Electrical and Electronic Engineering


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