Power current modeling of IC/LSI with load dependency for EMI simulation

Hideki Osaka, Osami Wada, Tomohiro Kinoshita, Yoshitaka Toyota, Daisuke Tanaka, Ryuji Koga

Research output: Contribution to journalConference articlepeer-review

16 Citations (Scopus)


In this paper, we described how we modeled EMI noise from the power-pin current of an LSI that has two ports: a power-ground port and a driver output port. We named this modeling the "Linear Equivalent Circuit and Current Source for I/O (LECCS-I/O)" model and with it measured power current and power-ground impedance for various combinations of loading capacitances and decoupling inductances using a small scale IC (74LVC04). Results showed that up to 500 MHz, the LECCS-I/O model could predict peak and valley frequencies of the power current where the error was within 2.5 MHz, and where the peak current error was less than 5 dB. The application range of the LECCS-I/O model is valid where the non-overlap duration of the dumping oscillation wave between cycles is longer than twice the time constant of the waveform.

Original languageEnglish
Pages (from-to)16-21
Number of pages6
JournalIEEE International Symposium on Electromagnetic Compatibility
Publication statusPublished - Oct 20 2003
Event2003 IEEE Symposium on Electromagnetic Compatibility - Boston, MA, United States
Duration: Aug 18 2003Aug 22 2003


  • Driver
  • EMI simulation
  • Impedance
  • Loading depandency
  • PCB
  • Power-pin current

ASJC Scopus subject areas

  • Condensed Matter Physics
  • Electrical and Electronic Engineering


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