TY - GEN
T1 - Total ionizing dose tolerance of the serial configuration on cyclone II FPGA
AU - Ito, Hiroyuki
AU - Watanabe, Minoru
N1 - Publisher Copyright:
© 2015 IEEE.
PY - 2016/3/2
Y1 - 2016/3/2
N2 - Recently, existing radiation-hardened static random access memory (SRAM)-based field programmable gate arrays (FPGAS) are anticipated for use in space radiation environments. Although such radiation-hardened SRAM-based FPGAS are programmable, the use of a radiation-damaged gate array has never been assessed for use with application-specific integrated circuits (ASICs) because its serial configuration is invariably damaged first by radiation so that the configuration itself becomes impossible. Therefore, currently available FPGA cannot be used in such faulty gate arrays used in space environments. However, if faulty programmable gate arrays are used, then the total ionizing dose tolerance of the programmable gate array would be increased even if its process technology were the same as that of conventional FPGAS. In this paper, in order to explore the possibility, we experimentally assessed the configuration circuit robust capabilities of a normal Cyclone II FPGA. Also, we examined the failure probability when using 1-bit, 2-bit, 4-bit, and 8-bit buses for the FPGA configuration using the designs of serially configured FPGAS.
AB - Recently, existing radiation-hardened static random access memory (SRAM)-based field programmable gate arrays (FPGAS) are anticipated for use in space radiation environments. Although such radiation-hardened SRAM-based FPGAS are programmable, the use of a radiation-damaged gate array has never been assessed for use with application-specific integrated circuits (ASICs) because its serial configuration is invariably damaged first by radiation so that the configuration itself becomes impossible. Therefore, currently available FPGA cannot be used in such faulty gate arrays used in space environments. However, if faulty programmable gate arrays are used, then the total ionizing dose tolerance of the programmable gate array would be increased even if its process technology were the same as that of conventional FPGAS. In this paper, in order to explore the possibility, we experimentally assessed the configuration circuit robust capabilities of a normal Cyclone II FPGA. Also, we examined the failure probability when using 1-bit, 2-bit, 4-bit, and 8-bit buses for the FPGA configuration using the designs of serially configured FPGAS.
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U2 - 10.1109/ICSOS.2015.7425067
DO - 10.1109/ICSOS.2015.7425067
M3 - Conference contribution
AN - SCOPUS:84965130962
T3 - 2015 IEEE International Conference on Space Optical Systems and Applications, ICSOS 2015
BT - 2015 IEEE International Conference on Space Optical Systems and Applications, ICSOS 2015
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - IEEE International Conference on Space Optical Systems and Applications, ICSOS 2015
Y2 - 26 October 2015 through 28 October 2015
ER -