TY - GEN
T1 - Very short critical path implementation of AES with direct logic gates
AU - Nekado, Kenta
AU - Nogami, Yasuyuki
AU - Iokibe, Kengo
N1 - Copyright:
Copyright 2021 Elsevier B.V., All rights reserved.
PY - 2012
Y1 - 2012
N2 - A lot of improvements and optimizations for the hardware implementation of AES algorithm have been reported. These reports often use, instead of arithmetic operations in the AES original, those in its isomorphic tower field and. This paper focuses on which provides higher-speed arithmetic operations than. In the case of adopting, not only high-speed arithmetic operations in but also high-speed basis conversion matrices from the to should be used. Thus, this paper improves arithmetic operations in with Redundantly Represented Basis (RRB), and provides basis conversion matrices with More Miscellaneously Mixed Bases (MMMB).
AB - A lot of improvements and optimizations for the hardware implementation of AES algorithm have been reported. These reports often use, instead of arithmetic operations in the AES original, those in its isomorphic tower field and. This paper focuses on which provides higher-speed arithmetic operations than. In the case of adopting, not only high-speed arithmetic operations in but also high-speed basis conversion matrices from the to should be used. Thus, this paper improves arithmetic operations in with Redundantly Represented Basis (RRB), and provides basis conversion matrices with More Miscellaneously Mixed Bases (MMMB).
KW - AES
KW - MixColumns
KW - SubBytes
KW - mixed bases
KW - type-I optimal normal basis
UR - http://www.scopus.com/inward/record.url?scp=84868339687&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=84868339687&partnerID=8YFLogxK
U2 - 10.1007/978-3-642-34117-5_4
DO - 10.1007/978-3-642-34117-5_4
M3 - Conference contribution
AN - SCOPUS:84868339687
SN - 9783642341168
T3 - Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
SP - 51
EP - 68
BT - Advances in Information and Computer Security - 7th International Workshop on Security, IWSEC 2012, Proceedings
PB - Springer Verlag
T2 - 7th International Workshop on Security, IWSEC 2012
Y2 - 7 November 2012 through 9 November 2012
ER -