0.18 μm CMOS process photodiode memory

Takayuki Kubota, Minoru Watanabe

研究成果

1 被引用数 (Scopus)

抄録

Currently, demand for high-speed dynamic reconfiguration of a programmable device is increasing for raising the performance level of such devices. To support high-speed dynamic reconfiguration, optically reconfigurable gate arrays (ORGAs) have been developed to date. An ORGA consists of a holographic memory, a laser array, and an optically reconfigurable gate array VLSI. The holographic memory can store many configuration contexts. Moreover, its large-bandwidth optical connection enables high-speed reconfiguration. Nevertheless, in previously proposed ORGA-VLSIs, the static configuration memory to store a single configuration context consumed a large implementation area of the ORGA-VLSIs and prevented the realization of large-gate-count ORGA-VLSIs. Therefore, a 0.18 μιη CMOS process photodiode memory has been newly fabricated to increase the gate density of ORGAs. The photodiode memory uses the junction capacitance of photodiodes as dynamic memory, thereby obviating the static configuration memory.

本文言語English
ホスト出版物のタイトル2013 IEEE International Symposium on Circuits and Systems, ISCAS 2013
ページ1464-1467
ページ数4
DOI
出版ステータスPublished - 2013
外部発表はい
イベント2013 IEEE International Symposium on Circuits and Systems, ISCAS 2013 - Beijing
継続期間: 5月 19 20135月 23 2013

出版物シリーズ

名前Proceedings - IEEE International Symposium on Circuits and Systems
ISSN(印刷版)0271-4310

Conference

Conference2013 IEEE International Symposium on Circuits and Systems, ISCAS 2013
国/地域China
CityBeijing
Period5/19/135/23/13

ASJC Scopus subject areas

  • 電子工学および電気工学

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