TY - JOUR
T1 - Dynamically Reconfigurable Logic LSI - PCA-1
T2 - The First Realization of the Plastic Cell Architecture
AU - Ito, Hideyuki
AU - Konishi, Ryusuke
AU - Nakada, Hiroshi
AU - Oguri, Kiyoshi
AU - Inamori, Minoru
AU - Nagoya, Akira
PY - 2003/5
Y1 - 2003/5
N2 - This paper describes the realization of a dynamically reconfigurable logic LSI based on a novel parallel computer architecture. The key point of the architecture is its dual-structured cell array which enables dynamic and autonomous reconfiguration of the logic circuits. The LSI was completed by successfully introducing two specific features: fully asynchronous logic circuits and a homogeneous structure, only LUTs are used.
AB - This paper describes the realization of a dynamically reconfigurable logic LSI based on a novel parallel computer architecture. The key point of the architecture is its dual-structured cell array which enables dynamic and autonomous reconfiguration of the logic circuits. The LSI was completed by successfully introducing two specific features: fully asynchronous logic circuits and a homogeneous structure, only LUTs are used.
KW - Asynchronous circuit design
KW - Autonomous reconfigurability
KW - Reconfigurable computing
UR - http://www.scopus.com/inward/record.url?scp=0141937972&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=0141937972&partnerID=8YFLogxK
M3 - Article
AN - SCOPUS:0141937972
SN - 0916-8532
VL - E86-D
SP - 859
EP - 867
JO - IEICE Transactions on Information and Systems
JF - IEICE Transactions on Information and Systems
IS - 5
ER -