TY - JOUR
T1 - Dynamically reconfigurable logic LSI
T2 - PCA-2
AU - Ito, Hideyuki
AU - Konishi, Ryusuke
AU - Nakada, Hiroshi
AU - Tsuboi, Hideyuki
AU - Okuyama, Yuichi
AU - Nagoya, Akira
PY - 2004/8
Y1 - 2004/8
N2 - Design points and the results seen in the development of a dynamically reconfigurable logic LSI, PCA-2, are described. PCA-2 enables the realization of flexible parallel processing based on the autonomous reconfiguration of logic circuits. To realize this feature, we introduce an asynchronous circuit design and a homogeneous cell array structure. PCA-2 represents an advance on the earlier LSI, PCA-1. Cutting edge CMOS technology is used to realize the structural merits of PCA hardware. Compared to PCA-1, PCA-2 offers 16 times greater integration level for programmable logic. Due to miniaturization and design refinement, PCA-2 provides a 6-fold increase in the circuit frequency of the configuration controller and a 3-fold increase in the operating frequency of the programmable logic. The results gained confirm the effects of refinement and the suitability of our architecture for device miniaturization.
AB - Design points and the results seen in the development of a dynamically reconfigurable logic LSI, PCA-2, are described. PCA-2 enables the realization of flexible parallel processing based on the autonomous reconfiguration of logic circuits. To realize this feature, we introduce an asynchronous circuit design and a homogeneous cell array structure. PCA-2 represents an advance on the earlier LSI, PCA-1. Cutting edge CMOS technology is used to realize the structural merits of PCA hardware. Compared to PCA-1, PCA-2 offers 16 times greater integration level for programmable logic. Due to miniaturization and design refinement, PCA-2 provides a 6-fold increase in the circuit frequency of the configuration controller and a 3-fold increase in the operating frequency of the programmable logic. The results gained confirm the effects of refinement and the suitability of our architecture for device miniaturization.
KW - Asynchronous circuit
KW - Autonomous reconfiguration
KW - Dynamically reconfigurable hardware
KW - Parallel computing
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M3 - Article
AN - SCOPUS:4344602993
SN - 0916-8532
VL - E87-D
SP - 2011
EP - 2020
JO - IEICE Transactions on Information and Systems
JF - IEICE Transactions on Information and Systems
IS - 8
ER -