Feasibility of Parasitic Drain Inductance Design for Minimizing Switching Loss in Bridge Circuits Using GaN-FETs
Koki Abe, Masataka Ishihara, Yusuke Hatakenaka, Kazuhiro Umetani, Eiji Hiraki
研究成果
Koki Abe, Masataka Ishihara, Yusuke Hatakenaka, Kazuhiro Umetani, Eiji Hiraki
研究成果